KURADA VERRA BHOGA VASANTHA RAYUDU; DHANANJAY RAMACHANDRA JAHAGIRDAR; PATRI SRIHARI RAO. Design and testing of systolic array multiplier using fault injecting schemes. Computer Science and Information Technologies, [S. l.], v. 3, n. 1, p. 1–9, 2022. DOI: 10.11591/csit.v3i1.pp1-9. Disponível em: http://csit.iaesprime.org/index.php/csit/article/view/81. Acesso em: 18 apr. 2026.